1. Field of the Invention
The present invention relates to adders. Further, the present invention relates to a signal processing circuit including a nonvolatile storage function and electronic devices including the signal processing circuit.
2. Description of the Related Art
In silicon semiconductor integrated circuits whose high integration and high performance are progressing, a significant increase in power consumption, in particular, static power consumption in a standby mode of the integrated circuits has been problematic. There is a method of using a nonvolatile memory such as a flash memory besides a volatile memory such as a DRAM or an SRAM in order to reduce the static power consumption in a silicon integrated chip. In this method, unnecessary power consumption can be suppressed by saving data in the nonvolatile memory and turning off the power when the integrated circuit is in a standby mode. However, a flash memory needs a high voltage and a long writing and reading time to save and return data.
To solve this problem, for example, a logic-in-memory architecture in which a storage function and an arithmetic function are combined using a Tunneling Magnetororesistive (TMR) element as a storage element is described in Non-Patent Document 1. Power consumption accompanied by saving and returning data can be reduced by employing the logic-in-memory architecture using a TMR element as a storage element. In the Non-Patent Document 1, a full adder including 24 transistors, 2 capacitors, and 4 TMR elements is described as a full adder using TMR elements.